SN74LVC74ADBR
| Parameters | |
|---|---|
| Height | 2mm |
| Length | 6.2mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Weight | 121.789551mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 7.1 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
SN74LVC74ADBR Overview
As a result, it is packaged as 14-SSOP (0.209, 5.30mm Width). It is included in the package Cut Tape (CT). T flip flop uses Differentialas the output. There is a trigger configured with Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates at 1.65V~3.6Vvolts. In this case, the operating temperature is -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. Its output frequency should not exceed 150MHz Hz. Despite external influences, it consumes 10μAof quiescent current. There have been 14 terminations. You can search similar parts based on 74LVC74. The power source is powered by 1.8V. Input capacitance of this device is 5pF farads. The electronic device belongs to the LVC/LCX/Zfamily. It is mounted in the way of Surface Mount. It is designed with 14 pins. This device's clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. Vsup reaches 3.6V, the maximal supply voltage. Using 2 circuits, it is highly flexible. Due to its reliability, this T flip flop is well suited for TR. It runs on 3.3Vvolts of power. With an output current of 24mA, it is possible to design the device in any way you want. It is designed with 1 output lines.
SN74LVC74ADBR Features
Cut Tape (CT) package
74LVC series
14 pins
3.3V power supplies
SN74LVC74ADBR Applications
There are a lot of Texas Instruments SN74LVC74ADBR Flip Flops applications.
- Synchronous counter
- High Performance Logic for test systems
- Count Modes
- ESCC
- Individual Asynchronous Resets
- ATE
- ESD protection
- Bus hold
- Registers
- Circuit Design
