SN74LVC74AQPWRG4Q1
| Parameters | |
|---|---|
| Clock Frequency | 100MHz |
| Propagation Delay | 6 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, D-Type |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.2mm |
| Length | 5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Weight | 57.209338mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | Automotive, AEC-Q100, 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74LVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
SN74LVC74AQPWRG4Q1 Overview
As a result, it is packaged as 14-TSSOP (0.173, 4.40mm Width). The package Tape & Reel (TR)contains it. T flip flop is configured with an output of Differential. This trigger uses the value Positive Edge. Surface Mountmounts this electrical part. With a supply voltage of 2V~3.6V volts, it operates. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This logic flip flop is classified as type D-Type. In FPGA terms, D flip flop is a type of Automotive, AEC-Q100, 74LVCseries FPGA. This D flip flop should not have a frequency greater than 100MHz. There is 10μA quiescent consumption. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74LVC74 family contains this object. The D flip flop is powered by a voltage of 1.8V . This T flip flop has a capacitance of 5pF farads at the input. This D flip flop belongs to the family of LVC/LCX/Z. This electronic part is mounted in the way of Surface Mount. As you can see from the design, it has pins with 14. It has a clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. In this case, the maximum supply voltage (Vsup) reaches 3.6V. The supply voltage (Vsup) should be kept above 2V for normal operation. 2 circuits are used to achieve its superior flexibility. Considering its reliability, this T flip flop is well suited for TR. The D latch runs on a voltage of 3.3V volts. There are 1 output lines on it.
SN74LVC74AQPWRG4Q1 Features
Tape & Reel (TR) package
Automotive, AEC-Q100, 74LVC series
14 pins
3.3V power supplies
SN74LVC74AQPWRG4Q1 Applications
There are a lot of Texas Instruments SN74LVC74AQPWRG4Q1 Flip Flops applications.
- Event Detectors
- Digital electronics systems
- Latch
- 2 – Bit synchronous counter
- Communications
- Shift Registers
- Storage Registers
- Storage registers
- High Performance Logic for test systems
- Differential Individual
