SN74LVC821ADGVR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-TFSOP (0.173, 4.40mm Width) |
| Number of Pins | 24 |
| Weight | 60.894776mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.4mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC821 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 8.5 ns |
| Turn On Delay Time | 2.2 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 7.3ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1.2mm |
| Length | 5mm |
| Width | 4.4mm |
| Thickness | 1.05mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC821ADGVR Overview
The flip flop is packaged in 24-TFSOP (0.173, 4.40mm Width). It is included in the package Cut Tape (CT). There is a Tri-State, Non-Invertedoutput configured with it. There is a trigger configured with Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. With a supply voltage of 1.65V~3.6V volts, it operates. A temperature of -40°C~85°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. It is a type of FPGA belonging to the 74LVC series. Its output frequency should not exceed 150MHz Hz. D latch consists of 1 elements. As a result, it consumes 10μA of quiescent current without being affected by external factors. Currently, there are 24 terminations. Members of the 74LVC821family make up this object. The power supply voltage is 1.8V. This JK flip flop has a 5pFfarad input capacitance. An electronic device belonging to the family LVC/LCX/Zcan be found here. A part of the electronic system is mounted in the way of Surface Mount. Basically, it is designed with a set of 24 pins. There is a clock edge trigger type of Positive Edgeon this device. This device is part of the FF/Latchesbase part number family. To achieve this superior flexibility, 8 circuits are used. This D flip flop is well suited for TR based on its reliable performance. The D flip flop has no ports embedded. This T flip flop features a maximum design flexibility due to its output current of 24mA. It operates with 3 output lines.
SN74LVC821ADGVR Features
Cut Tape (CT) package
74LVC series
24 pins
SN74LVC821ADGVR Applications
There are a lot of Texas Instruments SN74LVC821ADGVR Flip Flops applications.
- Communications
- High Performance Logic for test systems
- Patented noise
- Data Synchronizers
- Asynchronous counter
- Frequency division
- Control circuits
- Storage Registers
- Buffered Clock
- Frequency Dividers
