SN74LVC821ADW
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 24 |
| Weight | 624.398247mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74LVC821 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 8.5 ns |
| Turn On Delay Time | 2.2 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 7.3ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 2.65mm |
| Length | 15.4mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC821ADW Overview
As a result, it is packaged as 24-SOIC (0.295, 7.50mm Width). Package Tubeembeds it. T flip flop uses Tri-State, Non-Invertedas its output configuration. This trigger uses the value Positive Edge. This electronic part is mounted in the way of Surface Mount. It operates with a supply voltage of 1.65V~3.6V. Currently, the operating temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. FPGAs belonging to the 74LVCseries contain this type of chip. In order for it to function properly, its output frequency should not exceed 150MHz. D latch consists of 1 elements. This process consumes 10μA quiescents. In 24terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. This D latch belongs to the family of 74LVC821. A voltage of 1.8V is used as the power supply for this D latch. A 5pFfarad input capacitance is provided by this T flip flop. Devices in the LVC/LCX/Zfamily are electronic devices. It is mounted in the way of Surface Mount. This board is designed with 24pins on it. Its clock edge trigger type is Positive Edge. This part is included in FF/Latches. In order to achieve its superior flexibility, 8 circuits are used. The flip flop has 2ports embedded within it. As a result of its output current of 24mA, it is very flexible in terms of design. It has 3 output lines to operate.
SN74LVC821ADW Features
Tube package
74LVC series
24 pins
SN74LVC821ADW Applications
There are a lot of Texas Instruments SN74LVC821ADW Flip Flops applications.
- Differential Individual
- Consumer
- Individual Asynchronous Resets
- ATE
- Bus hold
- Asynchronous counter
- Counters
- Automotive
- Pattern generators
- Clock pulse
