Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
24-SOIC (0.209, 5.30mm Width) |
Number of Pins |
24 |
Weight |
307.790773mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVC |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
1.8V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVC821 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
10 |
Clock Frequency |
150MHz |
Propagation Delay |
8.5 ns |
Turn On Delay Time |
2.2 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
7.3ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
7.3 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Number of Output Lines |
10 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2mm |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVC821ANSRG4 Overview
24-SOIC (0.209, 5.30mm Width)is the way it is packaged. The Tape & Reel (TR)package contains it. Tri-State, Non-Invertedis the output configured for it. This trigger is configured to use Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The supply voltage is set to 1.65V~3.6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. This logic flip flop is classified as type D-Type. FPGAs belonging to the 74LVCseries contain this type of chip. A frequency of 150MHzshould be the maximum output frequency. In total, it contains 1 elements. As a result, it consumes 10μA quiescent current and is not affected by external forces. There have been 24 terminations. The object belongs to the 74LVC821 family. A voltage of 1.8V provides power to the D latch. This JK flip flop has a 5pFfarad input capacitance. This D flip flop belongs to the family of LVC/LCX/Z. Surface Mount mounts this electronic component. With its 24pins, it is designed to work with most electronic flip flops. This device has Positive Edgeas its clock edge trigger type. This device is part of the FF/Latchesbase part number family. The design is based on 10bits. Vsup reaches 3.6V, the maximal supply voltage. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. It runs on 3.3Vvolts of power. A total of 2ports are embedded in the D flip flop. In order for the chip to function, it has 10output lines.
SN74LVC821ANSRG4 Features
Tape & Reel (TR) package
74LVC series
24 pins
10 Bits
3.3V power supplies
SN74LVC821ANSRG4 Applications
There are a lot of Texas Instruments SN74LVC821ANSRG4 Flip Flops applications.
- Storage Registers
- Parallel data storage
- Synchronous counter
- Bounce elimination switch
- Shift Registers
- Safety Clamp
- Memory
- Guaranteed simultaneous switching noise level
- Buffered Clock
- Clock pulse