SN74LVC821APW
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 24 |
| Weight | 89.499445mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| Termination | SMD/SMT |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LVC821 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 8.8 ns |
| Turn On Delay Time | 2.2 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 7.3ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1.2mm |
| Length | 7.8mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC821APW Overview
24-TSSOP (0.173, 4.40mm Width)is the packaging method. It is contained within the Tubepackage. There is a Tri-State, Non-Invertedoutput configured with it. The trigger configured with it uses Positive Edge. Surface Mountis in the way of this electric part. With a supply voltage of 1.65V~3.6V volts, it operates. It is operating at a temperature of -40°C~85°C TA. It belongs to the type D-Typeof flip flops. In this case, it is a type of FPGA belonging to the 74LVC series. Its output frequency should not exceed 150MHz. There are 1 elements in it. There is 10μA quiescent consumption. There are 24 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The object belongs to the 74LVC821 family. The power supply voltage is 1.8V. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It belongs to the family of electronic devices known as LVC/LCX/Z. There is an electronic part that is mounted in the way of Surface Mount. It is designed with 24 pins. This device exhibits a clock edge trigger type of Positive Edge. It is part of the FF/Latchesbase part number family. To achieve this superior flexibility, 8 circuits are used. The flip flop has 2embedded ports. It offers maximum design flexibility with its output current of 24mA. It has 3 output lines to operate.
SN74LVC821APW Features
Tube package
74LVC series
24 pins
SN74LVC821APW Applications
There are a lot of Texas Instruments SN74LVC821APW Flip Flops applications.
- EMI reduction circuitry
- Modulo – n – counter
- Buffer registers
- Divide a clock signal by 2 or 4
- Instrumentation
- Parallel data storage
- Latch
- Consumer
- Asynchronous counter
- 2 – Bit synchronous counter
