Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
48-TFSOP (0.240, 6.10mm Width) |
Number of Pins |
48 |
Weight |
223.195796mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74LVTH |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
48 |
Termination |
SMD/SMT |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Base Part Number |
74LVTH16374 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
3.3V |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
64mA |
Number of Bits |
16 |
Clock Frequency |
160MHz |
Propagation Delay |
3 ns |
Quiescent Current |
5mA |
Turn On Delay Time |
3 ns |
Family |
LVT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
190μA |
Current - Output High, Low |
32mA 64mA |
Max I(ol) |
0.064 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
4.5ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
4.5 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Number of Input Lines |
1 |
Number of Output Lines |
3 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Translation |
N/A |
Height |
1.2mm |
Length |
12.5mm |
Width |
6.1mm |
Thickness |
1.15mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVTH16374DGGR Overview
The package is in the form of 48-TFSOP (0.240, 6.10mm Width). Package Cut Tape (CT)embeds it. Tri-State, Non-Invertedis the output configured for it. Positive Edgeis the trigger it is configured with. Surface Mountis in the way of this electric part. It operates with a supply voltage of 2.7V~3.6V. It is operating at -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. The 74LVTHseries comprises this type of FPGA. This D flip flop should not have a frequency greater than 160MHz. The list contains 2 elements. It consumes 190μA of quiescent current without being affected by external factors. Currently, there are 48 terminations. The 74LVTH16374 family contains it. The D flip flop is powered by a voltage of 3.3V . Its input capacitance is 3pF farads. The electronic device belongs to the LVTfamily. There is an electronic part that is mounted in the way of Surface Mount. There are 48pins on it. The clock edge trigger type for this device is Positive Edge. This RS flip flops is a part number FF/Latches. The flip flop is designed with 16bits. On the basis of its reliable performance, this D flip flop is well suited for use with TR. This flip flop has a total of 2ports. If high efficiency is desired, the supply voltage should be kept at 3.3V. Its output current of 64mAallows for maximum design flexibility. There are no output lines on the JK flip flop. The number of input lines is 1. This D latch consumes 5mA quiescent current at all.
SN74LVTH16374DGGR Features
Cut Tape (CT) package
74LVTH series
48 pins
16 Bits
SN74LVTH16374DGGR Applications
There are a lot of Texas Instruments SN74LVTH16374DGGR Flip Flops applications.
- Balanced 24 mA output drivers
- ESD performance
- Bus hold
- Frequency Divider circuits
- Differential Individual
- Parallel data storage
- ESD protection
- Shift Registers
- Set-reset capability
- Storage registers