SN74LVTH573IPWREP
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tape & Reel (TR) |
| Series | 74LVTH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVTH573 |
| Pin Count | 20 |
| Qualification Status | Not Qualified |
| Output Type | Tri-State |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 1 |
| Circuit | 8:8 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Number of Ports | 2 |
| Output Current | 64mA |
| Number of Bits | 8 |
| Propagation Delay | 2.9 ns |
| Turn On Delay Time | 2.9 ns |
| Family | LVT |
| Logic Function | D-Type, Latch |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Logic Type | D-Type Transparent Latch |
| Max I(ol) | 0.064 A |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Control Type | ENABLE LOW/HIGH |
| Power Supply Current-Max (ICC) | 5mA |
| Number of Output Lines | 8 |
| Count Direction | UNIDIRECTIONAL |
| Translation | N/A |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVTH573IPWREP Overview
In the 20-TSSOP (0.173, 4.40mm Width) package, it can be found as an embedded module. The package is in the form of Tape & Reel (TR). Tri-State is used for the output it is configured with. There is a logic type of D-Type Transparent Latch for this electrical device. The way in which this electronic part is mounted is Surface Mount. The supply voltage of the device is 2.7V~3.6V. A temperature of -40°C~85°C is used for operation. The 74LVTH series of FPGAs is the one this FPGA belongs to. Electronic parts with 8 bits are designed for this application. This device has been designed with 20 terminations available. 74LVTH573 is its family. The device works with a voltage of 3.3V for its supply voltage. The 20 pind are equipped with it. It is a member of the LVT family of electronic devices. It is designed with 20 pins. The electronic part is mounted using the Surface Mount method. This device has a total of 2 ports. Subcategory FF/Latches includes this part. The maximal supply voltage (Vsup) reaches 3.6V. Ensure that the supply voltage (Vsup) is greater than 2.7V. Based on its reliable performance, this device is well suited to TR. Due to its 64mA output current, it offers maximum design flexibility. For maximum efficiency, the supply voltage should be set to 3.3V. There are 8 output lines that correspond to the binary equivalents of the input line. This object is composed of 1 elements. When the maximum power current (ICC) is supplied for its operation, it reaches 5mA.
SN74LVTH573IPWREP Features
20-TSSOP (0.173, 4.40mm Width) package
74LVTH series
8 Bits
74LVTH573 family
20 pin count
20 pins
1 elements
SN74LVTH573IPWREP Applications
There are a lot of Texas Instruments SN74LVTH573IPWREP Latches applications.
- Watches
- Decade counting
- Multistage ripple counting
- Storage
- Parallel Input
- Buffer Storage
- OC-48 communication systems
- Pattern Generators
- Relay
- Accumulator Registers
