SN74LVTH573RGYR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Weight | 43.006227mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Cut Tape (CT) |
| Series | 74LVTH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | Bus Driver/Transceiver |
| Packing Method | TR |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | QUAD |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVTH573 |
| Pin Count | 20 |
| Qualification Status | Not Qualified |
| Output Type | Tri-State |
| Operating Supply Voltage | 3.3V |
| Circuit | 8:8 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2.7V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 64mA |
| Number of Bits | 8 |
| Propagation Delay | 2.9 ns |
| Turn On Delay Time | 2.9 ns |
| Family | LVT |
| Logic Function | D-Type, Latch |
| Current - Output High, Low | 32mA 64mA |
| Logic Type | D-Type Transparent Latch |
| Max I(ol) | 0.064 A |
| Control Type | ENABLE LOW |
| Power Supply Current-Max (ICC) | 5mA |
| Number of Input Lines | 1 |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Height | 1mm |
| Length | 4.5mm |
| Width | 3.5mm |
| Thickness | 900μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVTH573RGYR Overview
In the package 20-VFQFN Exposed Pad, it can be found. As a result, it has a packaging of Cut Tape (CT). It uses the output configuration Tri-State. There is a logic type of D-Type Transparent Latch associated with this electrical device. Electronic parts are mounted in accordance with Surface Mount. It operates with a supply voltage of 2.7V~3.6V. There is a temperature of -40°C~85°C at which the system operates. An FPGA in this series belongs to the 74LVTH family. The design of this electronic part is based on 8 bits. In this device, there are 20 terminations. It belongs to 74LVTH573 family. In order to operate it, the supply voltage must be 3.3V. 20 pins are provided. In terms of electronic devices, this one is in the LVT family. The device has 20 pins. Surface Mount is the method used for mounting this electronic part. This device has 2 ports on board, which are all available at the same time. It belongs to the subcategory of Bus Driver/Transceiver. A voltage greater than 2.7V must be supplied as a power supply (Vsup). Input Lines consist of electronic circuits, and there are 1. Based on its reliable performance, this device is suitable for TR. Due to its 64mA output current, it offers maximum design flexibility. A high level of efficiency is achieved by maintaining the supply voltage at 3.3V. There are 3 output lines that correspond to the binary equivalents of the input line. There is a limit on the maximal power current (ICC) supplied by the device for operation that reaches 5mA.
SN74LVTH573RGYR Features
20-VFQFN Exposed Pad package
74LVTH series
8 Bits
74LVTH573 family
20 pin count
20 pins
SN74LVTH573RGYR Applications
There are a lot of Texas Instruments SN74LVTH573RGYR Latches applications.
- Registers
- Automotive Cluster
- Parallel Input
- OC-48 communication systems
- Automotive Infotainment
- Buffer Storage
- Buffer/Storage Registers
- Bus system register with enable parallel lines at bus side
- Relay replacement
- Pattern generators
