SN74S112ADRG4
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74S |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Technology | TTL |
| Voltage - Supply | 4.75V~5.25V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74S112 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Output Current | 20mA |
| Clock Frequency | 125MHz |
| Propagation Delay | 7 ns |
| Turn On Delay Time | 4 ns |
| Family | S |
| Logic Function | AND |
| Current - Quiescent (Iq) | 25mA |
| Current - Output High, Low | 1mA 20mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 7ns @ 5V, 15pF |
| Trigger Type | Negative Edge |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Negative Edge |
| Max Frequency@Nom-Sup | 80000000Hz |
| Length | 9.9mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
SN74S112ADRG4 Overview
The flip flop is packaged in a case of 16-SOIC (0.154, 3.90mm Width). It is contained within the Tape & Reel (TR)package. As configured, the output uses Differential. In the configuration of the trigger, Negative Edgeis used. There is an electric part mounted in the way of Surface Mount. A supply voltage of 4.75V~5.25V is required for operation. It is at 0°C~70°C TAdegrees Celsius that the system is operating. There is JK Type type of electronic flip flop associated with this device. JK flip flop belongs to the 74Sseries of FPGAs. It should not exceed 125MHzin its output frequency. Despite external influences, it consumes 25mAof quiescent current. There are 16 terminations,D latch belongs to the 74S112 family. Power is provided by a 5V supply. An electronic device belonging to the family Scan be found here. This electronic part is mounted in the way of Surface Mount. This board is designed with 16pins on it. Its clock edge trigger type is Negative Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. For normal operation, the supply voltage (Vsup) should be above 4.75V. It runs on 5Vvolts of power. It offers maximum design flexibility with its output current of 20mA. Currently, there are 2 lines of input.
SN74S112ADRG4 Features
Tape & Reel (TR) package
74S series
16 pins
5V power supplies
SN74S112ADRG4 Applications
There are a lot of Texas Instruments SN74S112ADRG4 Flip Flops applications.
- Balanced 24 mA output drivers
- Shift Registers
- Instrumentation
- Counters
- Storage registers
- Convert a momentary switch to a toggle switch
- Dynamic threshold performance
- Event Detectors
- Data storage
- Single Down Count-Control Line
