SY100S351JY
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 28-LCC (J-Lead) |
| Number of Pins | 28 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2014 |
| Series | 100S |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 28 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | ECL |
| Voltage - Supply | -4.2V~-5.5V |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Reach Compliance Code | unknown |
| Base Part Number | 100S351 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Clock Frequency | 700MHz |
| Propagation Delay | 1.2 ns |
| Quiescent Current | -49mA |
| Number of Bits per Element | 6 |
| Trigger Type | Positive Edge |
| fmax-Min | 700 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 4.57mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SY100S351JY Overview
It is embeded in 28-LCC (J-Lead) case. Package Tubeembeds it. Differentialis the output configured for it. It is configured with the trigger Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of -4.2V~-5.5V volts. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This logic flip flop is classified as type D-Type. This type of FPGA is a part of the 100S series. A frequency of 700MHzshould not be exceeded by its output. D latch consists of 1 elements. Terminations are 28. The object belongs to the 100S351 family. Electronic part Surface Mountis mounted in the way. 28pins are included in its design. This device exhibits a clock edge trigger type of Positive Edge. -49mAquiescent current consumed.
SY100S351JY Features
Tube package
100S series
28 pins
SY100S351JY Applications
There are a lot of Microchip Technology SY100S351JY Flip Flops applications.
- CMOS Process
- Single Up Count-Control Line
- High Performance Logic for test systems
- Convert a momentary switch to a toggle switch
- Bus hold
- ESD performance
- Supports Live Insertion
- Balanced 24 mA output drivers
- Frequency Dividers
- Set-reset capability
