Parameters |
Input Capacitance |
5pF |
Max Frequency@Nom-Sup |
24000000Hz |
RoHS Status |
RoHS Compliant |
Factory Lead Time |
1 Week |
Mounting Type |
Through Hole |
Package / Case |
20-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2011 |
Series |
TC74HC |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Pitch |
2.54mm |
Base Part Number |
74HC273 |
JESD-30 Code |
R-PDIP-T20 |
Function |
Reset |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Power Supplies |
2/6V |
Load Capacitance |
50pF |
Clock Frequency |
66MHz |
Current - Quiescent (Iq) |
40μA |
Current - Output High, Low |
5.2mA 5.2mA |
Max I(ol) |
0.004 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
25ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
TC74HC273APF Overview
The item is packaged in 20-DIP (0.300, 7.62mm)cases. A package named Tubeincludes it. It is configured with Non-Invertedas an output. In the configuration of the trigger, Positive Edgeis used. In this case, the electronic component is mounted in the way of Through Hole. The JK flip flop operates at 2V~6Vvolts. Temperature is set to -40°C~85°C TA. D-Typedescribes this flip flop. In terms of FPGAs, it belongs to the TC74HC series. A frequency of 66MHzshould not be exceeded by its output. The element count is 1 . During its operation, it consumes 40μA quiescent energy. A total of 20terminations have been recorded. The 74HC273family includes it. Input capacitance of this device is 5pF farads. This RS flip flops is a part number FF/Latches. A power supply of 2/6Vis required to operate it.
TC74HC273APF Features
Tube package
TC74HC series
2/6V power supplies
TC74HC273APF Applications
There are a lot of Toshiba Semiconductor and Storage TC74HC273APF Flip Flops applications.
- Frequency Dividers
- Registers
- Latch
- ESD protection
- Latch-up performance
- Circuit Design
- Common Clocks
- ATE
- Asynchronous counter
- Bus hold