Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
100-TQFP |
Number of Pins |
100 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tray |
Published |
2001 |
Series |
CoolRunner II |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
Matte Tin (Sn) |
Additional Feature |
REAL DIGITAL DESIGN TECHNOLOGY |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
XA2C64A |
Pin Count |
100 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
1.8V |
Supply Voltage-Max (Vsup) |
1.9V |
Programmable Type |
In System Programmable |
Number of I/O |
64 |
Propagation Delay |
7.5 ns |
Number of Logic Elements/Cells |
4 |
Number of Gates |
1500 |
Max Frequency |
159MHz |
Speed Grade |
7 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Voltage Supply - Internal |
1.7V~1.9V |
Delay Time tpd(1) Max |
6.7ns |
Height Seated (Max) |
1.2mm |
RoHS Status |
ROHS3 Compliant |
XA2C64A-7VQG100I Overview
There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The product is contained in a 100-TQFP package.The device is programmed with 64 I/Os.100terminations are programmed into the device.The terminal position of this electrical component is QUAD.It is powered from a supply voltage of 1.8V.It is a part of family [0].It is recommended to package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Surface Mountshould be used for mounting the chip.As part of the CoolRunner IIseries, it is a type of FPGA.The chip is programmed with 100 pins.It is also possible to find REAL DIGITAL DESIGN TECHNOLOGYwhen using this device.Its related parts can be found in the [0].It is possible to construct digital circuits using 1500gates, which are devices that serve as building blocks.In order to maintain high efficiency, the supply voltage should be maintained at [0].In this case, Surface Mountis used to mount the electronic component.The 100pins are designed into the board.1.9Vrepresents the maximal supply voltage (Vsup).It is recommended that the maximal frequency be lower than 159MHz.Fundamental building blocks consist of 4logic elements/cells.
XA2C64A-7VQG100I Features
100-TQFP package
64 I/Os
The operating temperature of -40°C~85°C TA
100 pin count
100 pins
XA2C64A-7VQG100I Applications
There are a lot of Xilinx Inc. XA2C64A-7VQG100I CPLDs applications.
- I/O PORTS (MCU MODULE)
- Timing control
- Synchronous or asynchronous mode
- Battery operated portable devices
- Preset swapping
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Field programmable gate
- Portable digital devices
- ROM patching