Parameters |
Package / Case |
TQFP |
Surface Mount |
YES |
Number of Pins |
144 |
JESD-609 Code |
e0 |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
144 |
Terminal Finish |
Tin/Lead (Sn85Pb15) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
225 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
144 |
Operating Supply Voltage |
1.8V |
Supply Voltage-Max (Vsup) |
1.9V |
Temperature Grade |
COMMERCIAL |
Number of I/O |
118 |
Memory Type |
ROMless |
Propagation Delay |
6 ns |
Turn On Delay Time |
6 ns |
Frequency (Max) |
278MHz |
Organization |
0 DEDICATED INPUTS, 118 I/O |
Programmable Logic Type |
FLASH PLD |
Number of Logic Blocks (LABs) |
24 |
Speed Grade |
6 |
Output Function |
MACROCELL |
Number of Macro Cells |
384 |
JTAG BST |
YES |
In-System Programmable |
YES |
Length |
20mm |
Width |
20mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
XC2C384-6TQ144C Overview
A mobile phone network consists of 384macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).A TQFP package contains the item.The device is programmed with 118 I/O ports.It is programmed to terminate devices at [0].This electrical part has a terminal position of QUADand is connected to the ground.A voltage of 1.8V is used as the power supply for this device.This part is in the family [0].Chips are programmed with 144 pins.When using this device, YESis also available.In order to maintain high efficiency, the supply voltage should be maintained at [0].In order to store data, ROMlessis used.The device is designed with pins [0].In this case, the maximum supply voltage (Vsup) reaches 1.9V.In order to operate, the temperature should be higher than 0°C.It is recommended that the operating temperature be lower than 70°C.There are 24logic blocks (LABs) that make up its basic building block.It is recommended that the maximum frequency be less than 278MHz.There are several types of programmable logic that can be categorized as FLASH PLD.
XC2C384-6TQ144C Features
TQFP package
118 I/Os
144 pin count
144 pins
24 logic blocks (LABs)
XC2C384-6TQ144C Applications
There are a lot of Xilinx XC2C384-6TQ144C CPLDs applications.
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- ROM patching
- Bootloaders for FPGAs
- Protection relays
- ToR/Aggregation/Core Switch and Router
- State machine design
- Random logic replacement
- Portable digital devices
- Code converters
- Voltage level translation