XC2C512-10FT256I
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 256-LBGA |
| Number of Pins | 256 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tray |
| Published | 1997 |
| Series | CoolRunner II |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| ECCN Code | 3A991.D |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | XC2C512 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 1.8V |
| Supply Voltage-Max (Vsup) | 1.9V |
| Programmable Type | In System Programmable |
| Number of I/O | 212 |
| Propagation Delay | 10 ns |
| Number of Logic Elements/Cells | 32 |
| Number of Gates | 12000 |
| Max Frequency | 128MHz |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 1.7V~1.9V |
| Delay Time tpd(1) Max | 9.2ns |
| Height Seated (Max) | 1.55mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | Non-RoHS Compliant |
XC2C512-10FT256I Overview
There are 512 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The item is enclosed in a 256-LBGA package.In this case, there are 212 I/Os programmed.There are 256 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.Its terminal position is BOTTOM.There is 1.8V voltage supply for this device.It is a part of family [0].Trayshould be used to package the chip.It operates with the operating temperature of -40°C~85°C TA to ensure its reliability.Ensure that the chip is mounted by Surface Mount.This type of FPGA is a part of the CoolRunner II series.The chip is programmed with 256 pins.Additionally, this device is capable of displaying [0].The XC2C512indicates that related parts can be found.As a building block for digital circuits, there are 12000gates.In order to maintain high efficiency, the supply voltage should be maintained at [0].It is mounted by Surface Mount.A total of 256pins are provided on this board.In this case, the maximum supply voltage (Vsup) reaches 1.9V.Ideally, the maximal frequency should be lower than 128MHz Hz.An elementary building block consists of 32logic elements/cells.
XC2C512-10FT256I Features
256-LBGA package
212 I/Os
The operating temperature of -40°C~85°C TA
256 pin count
256 pins
XC2C512-10FT256I Applications
There are a lot of Xilinx Inc. XC2C512-10FT256I CPLDs applications.
- Software Configuration of Add-In Boards
- ToR/Aggregation/Core Switch and Router
- Programmable polarity
- Digital designs
- Power up sequencing
- Multiple DIP Switch Replacement
- Configurable Addressing of I/O Boards
- ROM patching
- DDC INTERFACE
- Address decoders
