Parameters |
Length |
6mm |
Width |
6mm |
RoHS Status |
Non-RoHS Compliant |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
56-LFBGA, CSPBGA |
Number of Pins |
56 |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Published |
2001 |
Series |
CoolRunner II |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
56 |
ECCN Code |
EAR99 |
Additional Feature |
REAL DIGITAL DESIGN TECHNOLOGY |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
XC2C64A |
Pin Count |
56 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
1.8V |
Supply Voltage-Max (Vsup) |
1.9V |
Programmable Type |
In System Programmable |
Number of I/O |
45 |
Memory Type |
ROMless |
Propagation Delay |
7.5 ns |
Number of Logic Elements/Cells |
4 |
Number of Gates |
1500 |
Max Frequency |
159MHz |
Speed Grade |
7 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Voltage Supply - Internal |
1.7V~1.9V |
Delay Time tpd(1) Max |
6.7ns |
Height Seated (Max) |
1.35mm |
XC2C64A-7CP56C Overview
There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.You can find it in package [0].There are 45 I/Os programmed in it.There is a 56terminations set on devices.As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.Power is provided by a supply voltage of 1.8V volts.It belongs to the family [0].It is recommended that the chip be packaged by Tray.Due to its reliability, it is operated at a temperature of [0].It is recommended to mount the chip by Surface Mount.The CoolRunner IIseries FPGA is one of these types.A chip with 56pins is programmed.It is also characterized by REAL DIGITAL DESIGN TECHNOLOGY.There are related parts in [0].It is possible to construct digital circuits using 1500gates, which are devices that serve as building blocks.High efficiency requires a voltage supply of [0].In this case, ROMlesswill be used to store the data.In this case, Surface Mountis used to mount the electronic component.A total of 56pins are provided on this board.1.9Vrepresents the maximal supply voltage (Vsup).It should be below 159MHzat the maximal frequency.Basic building blocks have 4logic elements.
XC2C64A-7CP56C Features
56-LFBGA, CSPBGA package
45 I/Os
The operating temperature of 0°C~70°C TA
56 pin count
56 pins
XC2C64A-7CP56C Applications
There are a lot of Xilinx Inc. XC2C64A-7CP56C CPLDs applications.
- Programmable power management
- Timing control
- ON-CHIP OSCILLATOR CIRCUIT
- Configurable Addressing of I/O Boards
- DMA control
- Power up sequencing
- State machine control
- Synchronous or asynchronous mode
- Custom state machines
- Wireless Infrastructure Base Band Unit and Remote Radio Unit