XC95108-10PQG160I
| Parameters | |
|---|---|
| Package / Case | PQFP |
| Surface Mount | YES |
| Number of Pins | 160 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Number of I/O | 108 |
| Memory Type | FLASH |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 66.7MHz |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 108 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
XC95108-10PQG160I Overview
A mobile phone network consists of 108macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).In the PQFPpackage, you will find it.As you can see, this device has 108 I/O ports programmed into it.160terminations have been programmed into the device.This electrical component has a terminal position of 0.A voltage of 5V is used as the power supply for this device.This part is included in Programmable Logic Devices.In this chip, the 160pins are programmed.This device is also capable of displaying [0].A high level of efficiency can be achieved by maintaining the supply voltage at [0].It is adopted to store data in [0].There are 160 pins on the device.Operating temperatures should be higher than 0°C.A temperature below 85°Cshould be used as the operating temperature.The program consists of 8 logic blocks (LABs).The maximum frequency should not exceed 66.7MHz.
XC95108-10PQG160I Features
PQFP package
108 I/Os
160 pin count
160 pins
8 logic blocks (LABs)
XC95108-10PQG160I Applications
There are a lot of Xilinx XC95108-10PQG160I CPLDs applications.
- Parity generators
- Custom shift registers
- State machine control
- Address decoders
- Power up sequencing
- Power Meter SMPS
- Reset swapping
- Digital designs
- Page register
- ROM patching
