XC95108-15PQG160I
| Parameters | |
|---|---|
| Package / Case | PQFP |
| Surface Mount | YES |
| Number of Pins | 160 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Number of I/O | 108 |
| Memory Type | FLASH |
| Propagation Delay | 15 ns |
| Frequency (Max) | 55.6MHz |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 15 |
| Output Function | MACROCELL |
| Number of Macro Cells | 108 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
XC95108-15PQG160I Overview
A mobile phone network consists of 108macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The item is enclosed in a PQFP package.As a result, it has 108 I/O ports programmed.It is programmed that device terminations will be 160 .This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.The device is powered by a voltage of 5V volts.This part is in the family [0].There are 160 pins on the chip.Additionally, this device is capable of displaying [0].High efficiency requires a voltage supply of [0].For storing data, it is recommended to use [0].There are 160pins on it.The operating temperature should be higher than -40°C.There should be a temperature below 85°Cat the time of operation.It consists of 8 logic blocks (LABs).It is recommended that the maximal frequency be lower than 55.6MHz.
XC95108-15PQG160I Features
PQFP package
108 I/Os
160 pin count
160 pins
8 logic blocks (LABs)
XC95108-15PQG160I Applications
There are a lot of Xilinx XC95108-15PQG160I CPLDs applications.
- I/O expansion
- Pattern recognition
- Digital multiplexers
- INTERRUPT SYSTEM
- ON-CHIP OSCILLATOR CIRCUIT
- ToR/Aggregation/Core Switch and Router
- Power up sequencing
- Voltage level translation
- Preset swapping
- White goods (Washing, Cold, Aircon ,...)
