Parameters |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
84 |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
84 |
ECCN Code |
EAR99 |
Terminal Finish |
Matte Tin (Sn) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
245 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
84 |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
69 |
Memory Type |
FLASH |
Propagation Delay |
20 ns |
Frequency (Max) |
50MHz |
Organization |
0 DEDICATED INPUTS, 69 I/O |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
20 |
Output Function |
MACROCELL |
Number of Macro Cells |
108 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height |
3.68mm |
Length |
29.41mm |
Width |
29.41mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
XC95108-20PCG84C Overview
There are 108 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The item is packaged with PLCC.As you can see, this device has 69 I/O ports programmed into it.84terminations have been programmed into the device.This electrical part has a terminal position of QUADand is connected to the ground.The power supply voltage is 5V.It is a part of family [0].It is equipped with 84 pin count.It is also characterized by YES.High efficiency requires the supply voltage to be maintained at [0].It is recommended to store data in [0].It is mounted by Surface Mount.The device is designed with pins [0].A voltage of 5.25V is the maximum supply voltage for this device.Despite its minimal supply voltage of [0], it is capable of operating.Operating temperatures should be higher than 0°C.Temperatures should not exceed 70°C.The system consists of 8 logic blocks (LABs).The maximal frequency should be lower than 50MHz.
XC95108-20PCG84C Features
PLCC package
69 I/Os
84 pin count
84 pins
8 logic blocks (LABs)
XC95108-20PCG84C Applications
There are a lot of Xilinx XC95108-20PCG84C CPLDs applications.
- Software-driven hardware configuration
- Interface bridging
- POWER-SAVING MODES
- Custom shift registers
- Synchronous or asynchronous mode
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- Voltage level translation
- Programmable polarity
- Pattern recognition
- Timing control