XC95144-10PQG160I
| Parameters | |
|---|---|
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 144 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Package / Case | PQFP |
| Surface Mount | YES |
| Number of Pins | 160 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Number of I/O | 133 |
| Memory Type | FLASH |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 66.7MHz |
| Organization | 0 DEDICATED INPUTS, 133 I/O |
| Number of Logic Blocks (LABs) | 8 |
XC95144-10PQG160I Overview
There are 144 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).In the PQFPpackage, you will find it.The device is programmed with 133 I/O ports.It is programmed to terminate devices at [0].This electrical part has a terminal position of QUADand is connected to the ground.The power source is powered by 5Vvolts.The part belongs to Programmable Logic Devices family.With 160pins programmed, the chip is ready to use.This device is also capable of displaying [0].If high efficiency is to be achieved, the supply voltage should be maintained at [0].FLASH is adopted for storing data.It is designed with 160 pins.The operating temperature should be higher than -40°C.There should be a temperature below 85°Cat the time of operation.There are 8logic blocks (LABs) that make up its basic building block.It is recommended that the maximal frequency be less than 0.
XC95144-10PQG160I Features
PQFP package
133 I/Os
160 pin count
160 pins
8 logic blocks (LABs)
XC95144-10PQG160I Applications
There are a lot of Xilinx XC95144-10PQG160I CPLDs applications.
- D/T registers and latches
- Voltage level translation
- Auxiliary Power Supply Isolated and Non-isolated
- Software-driven hardware configuration
- Dedicated input registers
- Field programmable gate
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Complex programmable logic devices
- Synchronous or asynchronous mode
