XC95144-15PQG160I
| Parameters | |
|---|---|
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Number of I/O | 133 |
| Memory Type | FLASH |
| Propagation Delay | 15 ns |
| Turn On Delay Time | 15 ns |
| Frequency (Max) | 55.6MHz |
| Organization | 0 DEDICATED INPUTS, 133 I/O |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 15 |
| Output Function | MACROCELL |
| Number of Macro Cells | 144 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Package / Case | PQFP |
| Surface Mount | YES |
| Number of Pins | 160 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
XC95144-15PQG160I Overview
The mobile phone network has 144 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).There is a PQFP package containing it.The device is programmed with 133 I/O ports.It is programmed that device terminations will be 160 .This electrical component has a terminal position of 0.Power is supplied by a voltage of 5V volts.It is included in Programmable Logic Devices.It is programmed with 160 pins.Additionally, this device is capable of displaying [0].In order to achieve high efficiency, the supply voltage should be maintained at [0].It is adopted to store data in [0].The device has a pinout of [0].It is recommended that the operating temperature be higher than -40°C.It is recommended that the operating temperature be below 85°C.There are 8 logic blocks (LABs) in its basic building block.It is recommended that the maximal frequency be less than 0.
XC95144-15PQG160I Features
PQFP package
133 I/Os
160 pin count
160 pins
8 logic blocks (LABs)
XC95144-15PQG160I Applications
There are a lot of Xilinx XC95144-15PQG160I CPLDs applications.
- Boolean function generators
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Address decoding
- Page register
- Digital multiplexers
- Custom shift registers
- Handheld digital devices
- PLC analog input modules
- Protection relays
- Synchronous or asynchronous mode
