Parameters |
Factory Lead Time |
1 Week |
Mounting Type |
Surface Mount |
Package / Case |
144-TFBGA, CSPBGA |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Bulk |
Published |
1996 |
Series |
XC9500XL |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
144 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn63Pb37) |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
144 |
Operating Supply Voltage |
3.3V |
Supply Voltage-Max (Vsup) |
3.6V |
Programmable Type |
In System Programmable (min 10K program/erase cycles) |
Number of I/O |
117 |
Memory Type |
FLASH |
Propagation Delay |
10 ns |
Turn On Delay Time |
10 ns |
Number of Logic Elements/Cells |
8 |
Number of Gates |
3200 |
Max Frequency |
100MHz |
Speed Grade |
10 |
Output Function |
MACROCELL |
Number of Macro Cells |
144 |
JTAG BST |
YES |
Voltage Supply - Internal |
3V~3.6V |
Height Seated (Max) |
1.2mm |
Length |
12mm |
Width |
12mm |
Radiation Hardening |
No |
RoHS Status |
Non-RoHS Compliant |
XC95144XL-10CS144I Overview
There are 144 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a 144-TFBGA, CSPBGA package containing it.It is programmed with 117 I/Os.Terminations of devices are set to [0].The terminal position of this electrical component is BOTTOM.A voltage of 3.3Vprovides power to the device.This part is in the family [0].Bulkshould be used to package the chip.To ensure its reliability, the operating temperature is set to [0].Chips should be mounted by Surface Mount.The XC9500XLseries FPGA is one of these types.In this chip, the 144pins are programmed.It is also characterized by YES.The 3200gates serve as building blocks for digital circuits.High efficiency requires a voltage supply of [0].In order to store data, FLASHis used.The maximal supply voltage (Vsup) reaches 3.6V.There should be a lower maximum frequency than 100MHz.Basic building blocks have 8logic elements.
XC95144XL-10CS144I Features
144-TFBGA, CSPBGA package
117 I/Os
The operating temperature of -40°C~85°C TA
144 pin count
XC95144XL-10CS144I Applications
There are a lot of Xilinx Inc. XC95144XL-10CS144I CPLDs applications.
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Battery operated portable devices
- Pattern recognition
- Digital systems
- Portable digital devices
- Interface bridging
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Boolean function generators
- PLC analog input modules
- Timing control