Parameters |
Factory Lead Time |
1 Week |
Mounting Type |
Surface Mount |
Package / Case |
144-TFBGA, CSPBGA |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Bulk |
Published |
1996 |
Series |
XC9500XL |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
144 |
ECCN Code |
EAR99 |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
3.3V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
144 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
3.3V |
Supply Voltage-Max (Vsup) |
3.6V |
Programmable Type |
In System Programmable (min 10K program/erase cycles) |
Number of I/O |
117 |
Memory Type |
FLASH |
Propagation Delay |
7.5 ns |
Number of Gates |
3200 |
Max Frequency |
125MHz |
Speed Grade |
7 |
Output Function |
MACROCELL |
Number of Macro Cells |
144 |
JTAG BST |
YES |
Voltage Supply - Internal |
3V~3.6V |
Number of Logic Elements/Blocks |
8 |
Height Seated (Max) |
1.2mm |
Length |
12mm |
Width |
12mm |
RoHS Status |
Non-RoHS Compliant |
XC95144XL-7CS144I Overview
There are 144 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).A 144-TFBGA, CSPBGA package contains the item.There are 117 I/Os programmed in it.Terminations of devices are set to [0].Its terminal position is BOTTOM.Power is supplied by a voltage of 3.3V volts.There is a part included in Programmable Logic Devices.It is recommended to package the chip by Bulk.The operating temperature of the machine is -40°C~85°C TA to ensure its reliability.Surface Mountshould be used for mounting the chip.In terms of FPGAs, it belongs to the XC9500XL series.Chips are programmed with 144 pins.It is also possible to find YESwhen using this device.A digital circuit can be constructed using 3200gates.If high efficiency is desired, the supply voltage should be kept at [0].In general, it is recommended to store data in [0].8logic elements/blocks exist.In this case, the maximum supply voltage (Vsup) reaches 3.6V.It is recommended that the maximal frequency be lower than 125MHz.
XC95144XL-7CS144I Features
144-TFBGA, CSPBGA package
117 I/Os
The operating temperature of -40°C~85°C TA
144 pin count
XC95144XL-7CS144I Applications
There are a lot of Xilinx Inc. XC95144XL-7CS144I CPLDs applications.
- STANDARD SERIAL INTERFACE UART
- Programmable power management
- State machine control
- Handheld digital devices
- INTERRUPT SYSTEM
- DDC INTERFACE
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- Discrete logic functions
- High speed graphics processing
- Address decoding