XC9536-10CSG48C
| Parameters | |
|---|---|
| Surface Mount | YES |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 48 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 48 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Number of I/O | 34 |
| Clock Frequency | 66.7MHz |
| Propagation Delay | 10 ns |
| Organization | 0 DEDICATED INPUTS, 34 I/O |
| Programmable Logic Type | FLASH PLD |
| Number of Logic Blocks (LABs) | 8 |
| Output Function | MACROCELL |
| Number of Macro Cells | 36 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Length | 7mm |
| Width | 7mm |
| RoHS Status | Non-RoHS Compliant |
XC9536-10CSG48C Overview
36macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.As you can see, this device has 34 I/O ports programmed into it.It is programmed that device terminations will be 48 .There is a BOTTOMterminal position on the electrical part in question.It is powered from a supply voltage of 5V.It is included in Programmable Logic Devices.Chips are programmed with 48 pins.The device can also be used to find [0].If high efficiency is desired, the supply voltage should be kept at [0].8logic blocks (LABs) make up this circuit.A frequency of 66.7MHzshould not be exceeded by its clock.Types of programmable logic are divided into FLASH PLD.It is recommended that the operating temperature be kept below 70°C.
XC9536-10CSG48C Features
34 I/Os
48 pin count
8 logic blocks (LABs)
XC9536-10CSG48C Applications
There are a lot of Xilinx XC9536-10CSG48C CPLDs applications.
- State machine control
- Complex programmable logic devices
- Code converters
- State machine design
- Timing control
- STANDARD SERIAL INTERFACE UART
- Address decoding
- Discrete logic functions
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Random logic replacement
