Parameters |
Mount |
Surface Mount |
Number of Pins |
256 |
JESD-609 Code |
e1 |
Pbfree Code |
yes |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
256 |
ECCN Code |
3A991.D |
Terminal Finish |
Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
Max Operating Temperature |
85°C |
Min Operating Temperature |
-40°C |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
1mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
256 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
3.3V |
Supply Voltage-Max (Vsup) |
3.6V |
Temperature Grade |
INDUSTRIAL |
Number of I/O |
212 |
Memory Type |
EEPROM |
Propagation Delay |
12 ns |
Frequency (Max) |
83MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
9000 |
Number of Logic Blocks (LABs) |
24 |
Speed Grade |
12 |
Output Function |
MACROCELL |
Number of Macro Cells |
384 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.55mm |
Length |
17mm |
Width |
17mm |
RoHS Status |
RoHS Compliant |
XCR3384XL-12FTG256I Overview
There are 384 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is programmed with 212 I/Os.It is programmed to terminate devices at [0].The terminal position of this electrical component is BOTTOM.Power is provided by a supply voltage of 3.3V volts.It is a part of the family [0].256pins are programmed on the chip.It is also possible to find YESwhen using this device.In digital circuits, 9000gates serve as building blocks.It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.It is recommended that data be stored in [0].This electronic part is mounted in the way of Surface Mount.The device is designed with pins [0].Supply voltage (Vsup) reaches a maximum of 3.6V.Ideally, the operating temperature should be greater than -40°C.A temperature below 85°Cshould be used as the operating temperature.It consists of 24 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.A programmable logic type can be categorized as EE PLD.
XCR3384XL-12FTG256I Features
212 I/Os
256 pin count
256 pins
24 logic blocks (LABs)
XCR3384XL-12FTG256I Applications
There are a lot of Xilinx XCR3384XL-12FTG256I CPLDs applications.
- Portable digital devices
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- ToR/Aggregation/Core Switch and Router
- High speed graphics processing
- Configurable Addressing of I/O Boards
- ON-CHIP OSCILLATOR CIRCUIT
- Bootloaders for FPGAs
- I/O PORTS (MCU MODULE)
- White goods (Washing, Cold, Aircon ,...)
- DMA control