Parameters |
RAM Size |
256KB |
Core Processor |
Quad ARM® Cortex®-A53 MPCore™ with CoreSight™, Dual ARM®Cortex™-R5 with CoreSight™, ARM Mali™-400 MP2 |
Peripherals |
DMA, WDT |
Connectivity |
CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG |
Architecture |
MCU, FPGA |
Primary Attributes |
Zynq®UltraScale+™ FPGA, 747K+ Logic Cells |
RoHS Status |
ROHS3 Compliant |
Factory Lead Time |
1 Week |
Package / Case |
1156-BBGA, FCBGA |
Operating Temperature |
0°C~100°C TJ |
Packaging |
Tray |
Published |
2016 |
Series |
Zynq® UltraScale+™ MPSoC EG |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
4 (72 Hours) |
HTS Code |
8542.31.00.01 |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Number of I/O |
328 |
Speed |
500MHz, 600MHz, 1.2GHz |
This SoC is built on Quad ARM? Cortex?-A53 MPCore? with CoreSight?, Dual ARM?Cortex?-R5 with CoreSight?, ARM Mali?-400 MP2 core processor(s).
Based on the core processor(s) Quad ARM? Cortex?-A53 MPCore? with CoreSight?, Dual ARM?Cortex?-R5 with CoreSight?, ARM Mali?-400 MP2, this SoC is built.According to the manufacturer, this system on a chip has a package of 1156-BBGA, FCBGA.As this SoC chip has 256KB RAM implemented, it provides reliable performance to its users.The internal architecture of this SoC design is based on the MCU, FPGA technique.Zynq? UltraScale+? MPSoC EG is the series in which this system on chip SoC falls under.It is recommended that this SoC meaning be operated at 0°C~100°C TJ on an average.A significant feature of this SoC security is the combination of Zynq?UltraScale+? FPGA, 747K+ Logic Cells.It is packaged in a state-of-the-art Tray package.As a whole, this SoC part is comprised of 328 inputs and outputs.
Quad ARM? Cortex?-A53 MPCore? with CoreSight?, Dual ARM?Cortex?-R5 with CoreSight?, ARM Mali?-400 MP2 processor.
256KB RAM.
Built on MCU, FPGA.
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