XMC4500F100K1024ACXQSA1
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 100-LQFP Exposed Pad |
| Number of Pins | 100 |
| Weight | 1.319103g |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tray |
| Published | 2013 |
| Series | XMC4000 |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Terminal Finish | Tin (Sn) |
| Max Power Dissipation | 1W |
| Frequency | 120MHz |
| Base Part Number | XMC4500 |
| Operating Supply Voltage | 3.3V |
| Interface | CAN, EBI/EMI, Ethernet, I2C, I2S, LIN, SPI, UART, USB |
| Memory Size | 1MB |
| Oscillator Type | Internal |
| Number of I/O | 55 |
| RAM Size | 160K x 8 |
| Voltage - Supply (Vcc/Vdd) | 3.13V~3.63V |
| Core Processor | ARM® Cortex®-M4 |
| Peripherals | DMA, I2S, LED, POR, PWM, WDT |
| Program Memory Type | FLASH |
| Core Size | 32-Bit |
| Program Memory Size | 1MB 1M x 8 |
| Connectivity | CANbus, EBI/EMI, Ethernet, I2C, LINbus, SPI, UART, USB |
| Data Converter | A/D 24x12b; D/A 2x12b |
| Watchdog Timer | Yes |
| Data Bus Width | 32b |
| Halogen Free | Halogen Free |
| Number of Timers/Counters | 4 |
| Core Architecture | ARM |
| Number of Programmable I/O | 73 |
| Number of ADC Channels | 24 |
| Number of SPI Channels | 2 |
| Number of USB Channels | 1 |
| Height | 1.4mm |
| Length | 14mm |
| Width | 14mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
XMC4500F100K1024ACXQSA1 Description
A microcontroller (MCU for microcontroller units) XMC4500F100K1024ACXQSA1 is a minicomputer on a single VLSI integrated circuit (IC) chip. The microcontroller contains one or more CPU (processor cores) and programmable inputs / outputs of memory and peripherals.
XMC4500F100K1024ACXQSA1 Features
? CPU Core
– High Performance 32-bit ARM Cortex-M4 CPU
– 16-bit and 32-bit Thumb2 instruction set
– DSP/MAC instructions
– System timer (SysTick) for Operating System support
? Floating Point Unit
? Memory Protection Unit
? Nested Vectored Interrupt Controller
? Two General Purpose DMA with up-to 12 channels
? Event Request Unit (ERU) for programmable processing of external and internal
service requests
? Flexible CRC Engine (FCE) for multiple bit error detection
On-Chip Memories
? 16 KB on-chip boot ROM
? 64 KB on-chip high-speed program memory
? 64 KB on-chip high speed data memory
? 32 KB on-chip high-speed communication
? 1024 KB on-chip Flash Memory with 4 KB instruction cache
Communication Peripherals
? Ethernet MAC module capable of 10/100 Mbit/s transfer rates
? Universal Serial Bus, USB 2.0 host, Full-Speed OTG, with integrated PHY
? Controller Area Network interface (MultiCAN), Full-CAN/Basic-CAN with 3 nodes, 64
message objects (MO), data rate up to 1MBit/s
? Six Universal Serial Interface Channels (USIC),providing 6 serial channels, usable as
UART, double-SPI, quad-SPI, IIC, IIS and LIN interfaces
? LED and Touch-Sense Controller (LEDTS) for Human-Machine interface
? SD and Multi-Media Card interface (SDMMC) for data storage memory cards
? External Bus Interface Unit (EBU) enabling communication with external memories
and off-chip peripherals
Analog Frontend Peripherals
? Four Analog-Digital Converters (VADC) of 12-bit resolution, 8 channels each, with
input out-of-range comparators
? Delta Sigma Demodulator with four channels, digital input stage for A/D signal
conversion
? Digital-Analogue Converter (DAC) with two channels of 12-bit resolution
XMC4500F100K1024ACXQSA1 Applications
programmable inputs / outputs of memory and peripherals
